Our new instruction coding will be:
<ul>
<li>1 byte for instruction opcode (o)</li>
<li>1 byte for register encoding (r)</li>
<li>4 bytes for immediate arithmetic values (i)</li>
<li>2 bytes for relative offsets (j)</li>
</ul>

Branching will be done with PC relative offsets.  The PC is the "Program
Counter", or "Instruction Pointer" (IP).  It points towards the next
instruction.  That means if you have a 3 byte jump instruction (1 byte
for opcode, 2 for offset) with an offset of 9, located at position 12:
the actual PC is 12+3, or 15, and the destination of the jump will be
15+9, or 24.

<code>
Registers:
R1, R2, R3, R4, R5  [all 32bit]

Arithmetic Opcodes:
 OP_ADD [dst,src] - [r/r]
 Adds src to dst, stores the result in dst.

 OP_SUB [dst,src] - [r/r]
 Subtracts src from dst, stores the result in dst.

 OP_MUL [dst,src] - [r/r]
 Multiplies dst by src, stores the result in dst.

 OP_DIV [dst,src] - [r/r]
 Divides dst by src, stores the result in dst.

Storage Opcodes:
 OP_CPY [dst,src] - [r/r]
 Copies src to dst.

 OP_SET [dst,imm] - [r/i]
 Sets dst to an immediate value.

 OP_PUR [reg]     - [r]
 Pushes a register onto the stack.

 OP_POR [reg]     - [r]
 Pops a value off the stack and into a register.

 OP_PUV [val]     - [i]
 Pushes an immediate value onto the stack.

 OP_POP []        - []
 Pops a value off the stack and ignores it.

 OP_PAR [reg,num] - [r,i]
 Reads a value off the stack frame into a register.
 For example, if the pushed parameters were 5,10,15,20,
  then OP_PAR R1, 3 would read 15, and OP_PAR R1, 0 would
  read 4 (the number of parameters pushed is first).

Branching Opcodes:
 OP_BRE [offs]      - [j]
 Branches to j if R1 is 0.

 OP_BRL [offs]      - [j]
 Branches to j if R1 is less than 0.

 OP_BRG [offs]      - [j]
 Branches to j if R1 is greater than 0.
 
 OP_JMP [offs]      - [j]
 Branches to j unconditionally.

 OP_END [i]         - [i]
 Halts the machine with code i.